Design of multipliers for moduli 24k+22k+1-23k+1-2k+1and (24k-23k+1+2k-1

P. S. Phalguna, Dattaguru V. Kamath, P. V.Ananda Mohan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, the design of modulo multipliers for the moduli (24k+22k+1 -23k+1-2k+1and (24k-23k+1+2k-1 is investigated. These moduli are useful for constructing four moduli sets with interesting properties resulting in simpler RNS to binary conversion architectures. The derived architectures of the multipliers can facilitate binary to RNS conversion as well. Hardware requirements and multiplication time are derived in tems of basic gates and ASIC implementation results are presented.

Original languageEnglish
Title of host publication2021 International Conference on Circuits, Controls and Communications, CCUBE 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665402033
DOIs
Publication statusPublished - 2021
Event2021 International Conference on Circuits, Controls and Communications, CCUBE 2021 - Bangalore, India
Duration: 23-12-202124-12-2021

Publication series

Name2021 International Conference on Circuits, Controls and Communications, CCUBE 2021

Conference

Conference2021 International Conference on Circuits, Controls and Communications, CCUBE 2021
Country/TerritoryIndia
CityBangalore
Period23-12-2124-12-21

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • Hardware and Architecture

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