DRV Evaluation of 6T SRAM Cell Using 45nm Technology

Vinod Kumar Joshi, Chetana Chetana

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We have evaluated Data Retention Voltage (DRV), an important characteristic of 6T SRAM cell in hold mode, for various process corners (PCs) by varying temperature (T). We noticed significant variation in the DRV value of 6T SRAM cell in hold mode for various PCs, Typical-Typical (TT), Slow-Slow (SS), Slow-Fast (SF), Fast-Slow (FS), Fast-Fast (FF) and Monte-Carlo (MC) at T= 150C, 250C, 500C, 750C and 1000C. The highest DRV value obtained for FS process corner is 113.5 mV at 250C, 111 mV at 500C, 108.5 mV at 750C and 107 mV at 1000C respectively. These values are considered as the worst case DRV. While for SS process corner the worst case DRV is reported as 120 mV at 150C temperature.

Original languageEnglish
Title of host publicationProceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages207-210
Number of pages4
ISBN (Electronic)9781728107448
DOIs
Publication statusPublished - 03-2019
Event2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019 - Shillong, India
Duration: 01-03-201902-03-2019

Publication series

NameProceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019

Conference

Conference2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019
CountryIndia
CityShillong
Period01-03-1902-03-19

Fingerprint

Static random access storage
evaluation
Electric potential
electric potential
cells
Temperature
temperature

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture
  • Signal Processing
  • Electrical and Electronic Engineering
  • Instrumentation

Cite this

Joshi, V. K., & Chetana, C. (2019). DRV Evaluation of 6T SRAM Cell Using 45nm Technology. In Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019 (pp. 207-210). [8902426] (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IESPC.2019.8902426
Joshi, Vinod Kumar ; Chetana, Chetana. / DRV Evaluation of 6T SRAM Cell Using 45nm Technology. Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 207-210 (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019).
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abstract = "We have evaluated Data Retention Voltage (DRV), an important characteristic of 6T SRAM cell in hold mode, for various process corners (PCs) by varying temperature (T). We noticed significant variation in the DRV value of 6T SRAM cell in hold mode for various PCs, Typical-Typical (TT), Slow-Slow (SS), Slow-Fast (SF), Fast-Slow (FS), Fast-Fast (FF) and Monte-Carlo (MC) at T= 150C, 250C, 500C, 750C and 1000C. The highest DRV value obtained for FS process corner is 113.5 mV at 250C, 111 mV at 500C, 108.5 mV at 750C and 107 mV at 1000C respectively. These values are considered as the worst case DRV. While for SS process corner the worst case DRV is reported as 120 mV at 150C temperature.",
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Joshi, VK & Chetana, C 2019, DRV Evaluation of 6T SRAM Cell Using 45nm Technology. in Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019., 8902426, Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019, Institute of Electrical and Electronics Engineers Inc., pp. 207-210, 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019, Shillong, India, 01-03-19. https://doi.org/10.1109/IESPC.2019.8902426

DRV Evaluation of 6T SRAM Cell Using 45nm Technology. / Joshi, Vinod Kumar; Chetana, Chetana.

Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 207-210 8902426 (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Joshi VK, Chetana C. DRV Evaluation of 6T SRAM Cell Using 45nm Technology. In Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 207-210. 8902426. (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019). https://doi.org/10.1109/IESPC.2019.8902426