High Linearity BiCMOS Multiplier/Transconductor Structures

Nabil I. Khachab, Abdul Aziz Al-Saqer, Joji G. Varghese

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A new wide-input range BiCMOS analog multiplier is proposed based on the triode and saturation region operation of the MOS transistors. The new circuit can also be reconfigured to operate as a versatile Operational Transconductance Amplifier, OTA, with independent current bias control for N stages. The novel design involves the use of attenuators at the input stage to boost the input linear range. It also utilizes a high output impedance subtractor setup at the output stage to obtain a single-ended output. The new circuit is characterized by its large input range, its high linearity and ability to operate at low voltages as well as high frequencies. HSPICE simulation results of the circuit, using the MOSIS 2 μm process parameters, resulted in an input range of ± 4 V (± 5 V supply), ± 1.9 V (± 3 V supply) and ± 1 V (± 2 V supply), with linearity error less than 0.5%. It's usages in certain analog signal processing applications are also discussed.

Original languageEnglish
Pages (from-to)47-61
Number of pages15
JournalAnalog Integrated Circuits and Signal Processing
Volume16
Issue number1
DOIs
Publication statusPublished - 01-01-1998
Externally publishedYes

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All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

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