Implementation of 32-Bit Arithmetic Logic Unit on Xilinx using VHDL

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In the present day knowledge, there is an massive requisite of developing appropriate data communication interfaces for real time embedded systems. Field Programmable Gate Array (FPGA) gives various means, which can be programmed for constructing an effective embedded unit. The FPGA configuration is generally specified using a hardware description language (HDL). VHDL (VHSIC hardware description language) is a hardware description language used in electronic design automation to explain digital and mixed-signal structures such as field programmable gate arrays (FPGA) and integrated circuits. This work proposes a technique to design and implement a 32 bit ALU which is a digital circuit that performs arithmetic and logical operations on Xilinx ISE using VHDL.

Original languageEnglish
Title of host publicationProceedings of the 2nd International Conference on Computing Methodologies and Communication, ICCMC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages525-529
Number of pages5
ISBN (Electronic)9781538634523
DOIs
Publication statusPublished - 09-10-2018
Event2nd International Conference on Computing Methodologies and Communication, ICCMC 2018 - Erode, India
Duration: 15-02-201816-02-2018

Publication series

NameProceedings of the 2nd International Conference on Computing Methodologies and Communication, ICCMC 2018

Conference

Conference2nd International Conference on Computing Methodologies and Communication, ICCMC 2018
Country/TerritoryIndia
CityErode
Period15-02-1816-02-18

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Safety, Risk, Reliability and Quality
  • Signal Processing

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