Implementation of interleaved dual boost converter utilizing FPGA for PWM

S. Suraj, Sarun Soman, J. J. Jijesh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

Boost converter with high power has turned into the key part of the power framework that enables power to be completely used. The novel way to accomplish a decreased current ripple and voltage ripple for dc chopper is actualized. Typical boost converter is interleaved to stop high input current stress on the switches. Interleaved Dual Boost Converter has two boost converter worked in parallel and controlled utilizing interleaved strategy with same frequency and phase shift. This method permits assembling a high productive and compact converter. In this paper different parameters of the interleaved dual boost converter are contrasted with a conventional boost converter for an output of 70V, 2A. The outcomes demonstrate that this converter accomplishes a superior performance.

Original languageEnglish
Title of host publication2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages79-83
Number of pages5
ISBN (Electronic)9781509007745
DOIs
Publication statusPublished - 05-01-2017
Event1st IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Bangalore, India
Duration: 20-05-201621-05-2016

Conference

Conference1st IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016
CountryIndia
CityBangalore
Period20-05-1621-05-16

Fingerprint

Phase shift
Pulse width modulation
Field programmable gate arrays (FPGA)
Switches
Electric potential

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Computer Science Applications
  • Information Systems
  • Electrical and Electronic Engineering

Cite this

Suraj, S., Soman, S., & Jijesh, J. J. (2017). Implementation of interleaved dual boost converter utilizing FPGA for PWM. In 2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings (pp. 79-83). [7807787] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RTEICT.2016.7807787
Suraj, S. ; Soman, Sarun ; Jijesh, J. J. / Implementation of interleaved dual boost converter utilizing FPGA for PWM. 2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 79-83
@inproceedings{015d414547de4bf096db289e62e4a4b4,
title = "Implementation of interleaved dual boost converter utilizing FPGA for PWM",
abstract = "Boost converter with high power has turned into the key part of the power framework that enables power to be completely used. The novel way to accomplish a decreased current ripple and voltage ripple for dc chopper is actualized. Typical boost converter is interleaved to stop high input current stress on the switches. Interleaved Dual Boost Converter has two boost converter worked in parallel and controlled utilizing interleaved strategy with same frequency and phase shift. This method permits assembling a high productive and compact converter. In this paper different parameters of the interleaved dual boost converter are contrasted with a conventional boost converter for an output of 70V, 2A. The outcomes demonstrate that this converter accomplishes a superior performance.",
author = "S. Suraj and Sarun Soman and Jijesh, {J. J.}",
year = "2017",
month = "1",
day = "5",
doi = "10.1109/RTEICT.2016.7807787",
language = "English",
pages = "79--83",
booktitle = "2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
address = "United States",

}

Suraj, S, Soman, S & Jijesh, JJ 2017, Implementation of interleaved dual boost converter utilizing FPGA for PWM. in 2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings., 7807787, Institute of Electrical and Electronics Engineers Inc., pp. 79-83, 1st IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016, Bangalore, India, 20-05-16. https://doi.org/10.1109/RTEICT.2016.7807787

Implementation of interleaved dual boost converter utilizing FPGA for PWM. / Suraj, S.; Soman, Sarun; Jijesh, J. J.

2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. p. 79-83 7807787.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Implementation of interleaved dual boost converter utilizing FPGA for PWM

AU - Suraj, S.

AU - Soman, Sarun

AU - Jijesh, J. J.

PY - 2017/1/5

Y1 - 2017/1/5

N2 - Boost converter with high power has turned into the key part of the power framework that enables power to be completely used. The novel way to accomplish a decreased current ripple and voltage ripple for dc chopper is actualized. Typical boost converter is interleaved to stop high input current stress on the switches. Interleaved Dual Boost Converter has two boost converter worked in parallel and controlled utilizing interleaved strategy with same frequency and phase shift. This method permits assembling a high productive and compact converter. In this paper different parameters of the interleaved dual boost converter are contrasted with a conventional boost converter for an output of 70V, 2A. The outcomes demonstrate that this converter accomplishes a superior performance.

AB - Boost converter with high power has turned into the key part of the power framework that enables power to be completely used. The novel way to accomplish a decreased current ripple and voltage ripple for dc chopper is actualized. Typical boost converter is interleaved to stop high input current stress on the switches. Interleaved Dual Boost Converter has two boost converter worked in parallel and controlled utilizing interleaved strategy with same frequency and phase shift. This method permits assembling a high productive and compact converter. In this paper different parameters of the interleaved dual boost converter are contrasted with a conventional boost converter for an output of 70V, 2A. The outcomes demonstrate that this converter accomplishes a superior performance.

UR - http://www.scopus.com/inward/record.url?scp=85014991542&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85014991542&partnerID=8YFLogxK

U2 - 10.1109/RTEICT.2016.7807787

DO - 10.1109/RTEICT.2016.7807787

M3 - Conference contribution

SP - 79

EP - 83

BT - 2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Suraj S, Soman S, Jijesh JJ. Implementation of interleaved dual boost converter utilizing FPGA for PWM. In 2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2017. p. 79-83. 7807787 https://doi.org/10.1109/RTEICT.2016.7807787