Implementation of Low Voltage Floating Gate MOSFET based Current Mirror Circuits using 180nm technology

Ansuman Mishra, M. Vineeth Bhat, Prasad Krishna Pai, D. V. Kamath

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The paper discusses implementation of low voltage (LV) basic current mirror (CM) and cascode current mirror (CCM) circuits using Floating Gate MOSFET (FGMOS) devices. The performance parameters such as output resistance, minimum output voltage requirement and power dissipation are compared for basic CM and double CCM circuits. The current mirror circuits are implemented with 180 nm technology using Cadence Virtuoso and simulated with Spectre RF. The simulation results are in good agreement with theory. The FGMOS based basic CM and double CCM circuits exhibited 52.4% and 40% power reduction as compared to gate driven current mirror circuits.

Original languageEnglish
Title of host publicationProceedings of the 3rd International Conference on Inventive Systems and Control, ICISC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages268-272
Number of pages5
ISBN (Electronic)9781538639504
DOIs
Publication statusPublished - 01-2019
Event3rd International Conference on Inventive Systems and Control, ICISC 2019 - Coimbatore, India
Duration: 10-01-201911-01-2019

Publication series

NameProceedings of the 3rd International Conference on Inventive Systems and Control, ICISC 2019

Conference

Conference3rd International Conference on Inventive Systems and Control, ICISC 2019
CountryIndia
CityCoimbatore
Period10-01-1911-01-19

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Computer Networks and Communications
  • Computer Science Applications
  • Information Systems and Management
  • Control and Optimization

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