Power system Vertical Division State Estimation (VDSE) application to super node area

H. Nagaraja Udupa, Asheesh Shah, Ravishankar Kamath

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The publication [1] provides a unique parallel solution for electrical power system state estimation called Vertical Division State Estimation technique (VDSE). In this technique the measurements are grouped around the node clusters and processed independently, whereas in conventional state estimation whole power system network is considered as single entity and that is why the computational time required is considerably large. For real time EMS application state estimator is the integral part and it should be capable of giving the estimation of state variable in very short interval of time. To address this issue various techniques are developed such as dynamic state estimation, tracking, AI technique, multi-area technique, Two Level state estimation (TLSE) etc. In TLSE technique the power system network is sub-divided into smaller area such that each sub network can be processed independently. The publication [2] shows the application of VDSE on to TLSE. This paper presents the application of VDSE technique on to super node area level. A node along with its connected nodes is called node area and combination of two node areas is called 'Super Node Area'. By applying VDSE to super node area cluster the number of parallel processors required can be reduced drastically while keeping the computational time within limit. The concept is tested on 13 and 30 bus IEEE test system and compared with ISE and Node level SE.

Original languageEnglish
Title of host publicationInternational Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1311-1316
Number of pages6
ISBN (Electronic)9781509046201
DOIs
Publication statusPublished - 22-06-2017
Externally publishedYes
Event2016 IEEE International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Paralakhernundi, Odisha, India
Duration: 03-10-201605-10-2016

Conference

Conference2016 IEEE International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016
CountryIndia
CityParalakhernundi, Odisha
Period03-10-1605-10-16

Fingerprint

State estimation

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Signal Processing
  • Software

Cite this

Udupa, H. N., Shah, A., & Kamath, R. (2017). Power system Vertical Division State Estimation (VDSE) application to super node area. In International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Proceedings (pp. 1311-1316). [7955652] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SCOPES.2016.7955652
Udupa, H. Nagaraja ; Shah, Asheesh ; Kamath, Ravishankar. / Power system Vertical Division State Estimation (VDSE) application to super node area. International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 1311-1316
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Udupa, HN, Shah, A & Kamath, R 2017, Power system Vertical Division State Estimation (VDSE) application to super node area. in International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Proceedings., 7955652, Institute of Electrical and Electronics Engineers Inc., pp. 1311-1316, 2016 IEEE International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016, Paralakhernundi, Odisha, India, 03-10-16. https://doi.org/10.1109/SCOPES.2016.7955652

Power system Vertical Division State Estimation (VDSE) application to super node area. / Udupa, H. Nagaraja; Shah, Asheesh; Kamath, Ravishankar.

International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. p. 1311-1316 7955652.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Udupa HN, Shah A, Kamath R. Power system Vertical Division State Estimation (VDSE) application to super node area. In International Conference on Signal Processing, Communication, Power and Embedded System, SCOPES 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2017. p. 1311-1316. 7955652 https://doi.org/10.1109/SCOPES.2016.7955652